This invention relates generally to circuitry for implementing mathematical calculations, and more particularly the invention relates to circuitry for performing square root operations.
In processing electrical signals in an ultrasonic phased array sector scanner to obtain focused imaging, the time delay differences between transducer elements in receiving reflected ultrasonic waves at a specific focal depth and beam angle must be calculated. The general equations describing total time delay requires obtaining the square root of a function of the beam angle, focal depth, and transducer element in the array.
A number of known techniques for performing square root functions are not feasible in such an application because of the time requirements in carrying out the calculations. For example, a high level language computation requiring a plurality of multiplication and addition steps is too slow. Another alternative is the use of software tables, but such tables involve a very large number of bytes and cannot be as general as required since each frequency, depth, and transducer configuration requires about 56,000 bytes. Thus, calculations for only a two transducer array with eleven depths and three frequencies requires about 3.7 megabytes of storage. Further, use of a software table does not readily permit the use of arbitrary focal depths as might be desirable with range gated pulse echo doppler.
Hardware integrated circuits which directly perform square roots are quite limited, and the fastest product (Intel 8087) requires about 36 microseconds justifying the floating points. Moreover, the required usage of floating point numbers would further slow the other necessary computations.
Other alternatives include the use of a software algorithm in which a first guess is made reasonably good by using a table lookup. However, such a technique would require a divide, add, and multiply to compute the square root and the procedure would be more time consuming than desired. Alternatively, the square root can be approximated using a common polynomial based on a Taylor series expansion. The accuracy of the approximation depends on the number of terms used and again is more time consuming than desired for a sector scanner application.
Yang, "Gate Array for Square Root Chip Meets Military Systems Needs", pg. 167-174 EDN Aug. 23, 1984 derives square roots by describing the input number as a succession of partial remainders, each one functioning on the remainder before. The gate array circuitry ripples the calculations to a final result. While the circuitry is fast in implementing the square root function, the circuitry is complex and requires substantial power.
In accordance with the present invention circuitry is provided which performs the square root function in a time period which is compatible with ultrasonic sector scan applications and which does not require substantial electrical power. For example, the 1/32 of a wavelength requirement at 7.5 megahertz implies a resolution of 1/156 millimeter. This requires eight bits (1/256) of precision. For focal depths from one millimeter to less than 250 millimeters, the interger part of the range can be obtained in eight bits (less than 1/256) also, A circuit in accordance with the invention designed to find a square root with 16 bits of precision, with a radix point assumed between bits eight and nine, implies that the input number has 32 bits of precision.